// ****************************************************************************** 
// Copyright     :  Copyright (C) 2018, Hisilicon Technologies Co. Ltd.
// File name     :  rgmii_reg_offset_field.h
// Project line  :  Platform And Key Technologies Development
// Department    :  CAD Development Department
// Author        :  xxx
// Version       :  1.0
// Date          :  2013/3/10
// Description   :  The description of xxx project
// Others        :  Generated automatically by nManager V4.2 
// History       :  xxx 2018/05/14 19:22:56 Create file
// ******************************************************************************

#ifndef __RGMII_REG_OFFSET_FIELD_H__
#define __RGMII_REG_OFFSET_FIELD_H__

#define RGMII_STATION_ADDR_LOW_LEN    32
#define RGMII_STATION_ADDR_LOW_OFFSET 0

#define RGMII_STATION_ADDR_HIGH_LEN    16
#define RGMII_STATION_ADDR_HIGH_OFFSET 0

#define RGMII_DUPLEX_SEL_RGMII_LEN    1
#define RGMII_DUPLEX_SEL_RGMII_OFFSET 0

#define RGMII_FD_FC_TYPE_LEN    16
#define RGMII_FD_FC_TYPE_OFFSET 0

#define RGMII_COL_DISTANCE_LEN    10
#define RGMII_COL_DISTANCE_OFFSET 0

#define RGMII_FC_TX_TIMER_LEN    16
#define RGMII_FC_TX_TIMER_OFFSET 0

#define RGMII_FD_FC_ADDR_LOW_LEN    32
#define RGMII_FD_FC_ADDR_LOW_OFFSET 0

#define RGMII_FD_FC_ADDR_HIGH_LEN    16
#define RGMII_FD_FC_ADDR_HIGH_OFFSET 0

#define RGMII_IPG_TX_TIMER_LEN    8
#define RGMII_IPG_TX_TIMER_OFFSET 0

#define RGMII_PAUSE_THR_LEN    16
#define RGMII_PAUSE_THR_OFFSET 0

#define RGMII_MAX_FRM_SIZE_LEN    14
#define RGMII_MAX_FRM_SIZE_OFFSET 0

#define RGMII_PORT_MODE_LEN    3
#define RGMII_PORT_MODE_OFFSET 0

#define RGMII_TX_EN_LEN    1
#define RGMII_TX_EN_OFFSET 2
#define RGMII_RX_EN_LEN    1
#define RGMII_RX_EN_OFFSET 1

#define RGMII_TX_FDFC_LEN    1
#define RGMII_TX_FDFC_OFFSET 1
#define RGMII_RX_FDFC_LEN    1
#define RGMII_RX_FDFC_OFFSET 0

#define RGMII_SHORT_RUNTS_THR_LEN    5
#define RGMII_SHORT_RUNTS_THR_OFFSET 0

#define RGMII_DROP_UNK_CTL_FRM_LEN    1
#define RGMII_DROP_UNK_CTL_FRM_OFFSET 0

#define RGMII_PAD_ENABLE_LEN    1
#define RGMII_PAD_ENABLE_OFFSET 7
#define RGMII_CRC_ADD_LEN       1
#define RGMII_CRC_ADD_OFFSET    6

#define RGMII_CRC_ERR_PASS_LEN      1
#define RGMII_CRC_ERR_PASS_OFFSET   5
#define RGMII_PAUSE_FRM_PASS_LEN    1
#define RGMII_PAUSE_FRM_PASS_OFFSET 4
#define RGMII_VLAN_DROP_EN_LEN      1
#define RGMII_VLAN_DROP_EN_OFFSET   3
#define RGMII_BC_DROP_EN_LEN        1
#define RGMII_BC_DROP_EN_OFFSET     2
#define RGMII_MC_MATCH_EN_LEN       1
#define RGMII_MC_MATCH_EN_OFFSET    1
#define RGMII_UC_MATCH_EN_LEN       1
#define RGMII_UC_MATCH_EN_OFFSET    0

#define RGMII_PORT_MC_ADDR_LOW_LEN    32
#define RGMII_PORT_MC_ADDR_LOW_OFFSET 0

#define RGMII_PORT_MC_ADDR_HIGH_LEN    16
#define RGMII_PORT_MC_ADDR_HIGH_OFFSET 0

#define RGMII_SOFT_RST_MDIO_LEN    1
#define RGMII_SOFT_RST_MDIO_OFFSET 3
#define RGMII_SOFT_RST_MII_LEN     1
#define RGMII_SOFT_RST_MII_OFFSET  2
#define RGMII_SOFT_RST_RX_LEN      1
#define RGMII_SOFT_RST_RX_OFFSET   1
#define RGMII_SOFT_RST_TX_LEN      1
#define RGMII_SOFT_RST_TX_OFFSET   0

#define RGMII_RX_OCTETS_OK_CNT_LEN    32
#define RGMII_RX_OCTETS_OK_CNT_OFFSET 0

#define RGMII_RX_OCTETS_BAD_CNT_LEN    32
#define RGMII_RX_OCTETS_BAD_CNT_OFFSET 0

#define RGMII_RX_UC_PKTS_CNT_LEN    32
#define RGMII_RX_UC_PKTS_CNT_OFFSET 0

#define RGMII_RX_MC_PKTS_CNT_LEN    32
#define RGMII_RX_MC_PKTS_CNT_OFFSET 0

#define RGMII_RX_BC_PKTS_CNT_LEN    32
#define RGMII_RX_BC_PKTS_CNT_OFFSET 0

#define RGMII_RX_PKS_64OCT_CNT_LEN    32
#define RGMII_RX_PKS_64OCT_CNT_OFFSET 0

#define RGMII_RX_PKS_65TO127_OCT_CNT_LEN    32
#define RGMII_RX_PKS_65TO127_OCT_CNT_OFFSET 0

#define RGMII_RX_PKTS_128TO255_OCT_CNT_LEN    32
#define RGMII_RX_PKTS_128TO255_OCT_CNT_OFFSET 0

#define RGMII_RX_PKTS_256TO511_OCT_CNT_LEN    32
#define RGMII_RX_PKTS_256TO511_OCT_CNT_OFFSET 0

#define RGMII_RX_PKTS_512TO1023_OCT_CNT_LEN    32
#define RGMII_RX_PKTS_512TO1023_OCT_CNT_OFFSET 0

#define RGMII_RX_PKTS_1024TO1518_OCT_CNT_LEN    32
#define RGMII_RX_PKTS_1024TO1518_OCT_CNT_OFFSET 0

#define RGMII_RX_PKTS_1519TOMAX_OCT_CNT_LEN    32
#define RGMII_RX_PKTS_1519TOMAX_OCT_CNT_OFFSET 0

#define RGMII_RX_FCS_ERRORS_LEN    32
#define RGMII_RX_FCS_ERRORS_OFFSET 0

#define RGMII_RX_TAGGED_LEN    32
#define RGMII_RX_TAGGED_OFFSET 0

#define RGMII_RX_DATA_ERR_LEN    32
#define RGMII_RX_DATA_ERR_OFFSET 0

#define RGMII_RX_ALIGN_ERRORS_LEN    32
#define RGMII_RX_ALIGN_ERRORS_OFFSET 0

#define RGMII_RX_LONG_ERRORS_LEN    32
#define RGMII_RX_LONG_ERRORS_OFFSET 0

#define RGMII_RX_JABBER_ERRORS_LEN    32
#define RGMII_RX_JABBER_ERRORS_OFFSET 0

#define RGMII_RX_PAUSE_MACCONTROL_FRAMECOUNTER_LEN    32
#define RGMII_RX_PAUSE_MACCONTROL_FRAMECOUNTER_OFFSET 0

#define RGMII_RX_UNKNOWN_MACCONTROL_FRAMECOUNTER_LEN    32
#define RGMII_RX_UNKNOWN_MACCONTROL_FRAMECOUNTER_OFFSET 0

#define RGMII_RX_VERY_LONG_ERR_CNT_LEN    32
#define RGMII_RX_VERY_LONG_ERR_CNT_OFFSET 0

#define RGMII_RX_RUNT_ERR_CNT_LEN    32
#define RGMII_RX_RUNT_ERR_CNT_OFFSET 0

#define RGMII_RX_SHORT_ERR_CNT_LEN    32
#define RGMII_RX_SHORT_ERR_CNT_OFFSET 0

#define RGMII_OCTETS_TRANSMITTED_OK_LEN    32
#define RGMII_OCTETS_TRANSMITTED_OK_OFFSET 0

#define RGMII_OCTETS_TRANSMITTED_BAD_LEN    32
#define RGMII_OCTETS_TRANSMITTED_BAD_OFFSET 0

#define RGMII_TX_UC_PKTS_LEN    32
#define RGMII_TX_UC_PKTS_OFFSET 0

#define RGMII_TX_MC_PKTS_LEN    32
#define RGMII_TX_MC_PKTS_OFFSET 0

#define RGMII_TX_BC_PKTS_LEN    32
#define RGMII_TX_BC_PKTS_OFFSET 0

#define RGMII_TX_PKTS_64OCTETS_LEN    32
#define RGMII_TX_PKTS_64OCTETS_OFFSET 0

#define RGMII_TX_PKTS_65TO127OCTETS_LEN    32
#define RGMII_TX_PKTS_65TO127OCTETS_OFFSET 0

#define RGMII_TX_PKTS_128TO255OCTETS_LEN    32
#define RGMII_TX_PKTS_128TO255OCTETS_OFFSET 0

#define RGMII_TX_PKTS_256TO511OCTETS_LEN    32
#define RGMII_TX_PKTS_256TO511OCTETS_OFFSET 0

#define RGMII_TX_PKTS_512TO1023OCTETS_LEN    32
#define RGMII_TX_PKTS_512TO1023OCTETS_OFFSET 0

#define RGMII_TX_PKTS_1024TO1518OCTETS_LEN    32
#define RGMII_TX_PKTS_1024TO1518OCTETS_OFFSET 0

#define RGMII_TX_PKTS_1519TOMAXOCTES_LEN    32
#define RGMII_TX_PKTS_1519TOMAXOCTES_OFFSET 0

#define RGMII_TX_LATE_COL_CNT_LEN    32
#define RGMII_TX_LATE_COL_CNT_OFFSET 0

#define RGMII_TX_EXC_COL_ERR_CNT_LEN    32
#define RGMII_TX_EXC_COL_ERR_CNT_OFFSET 0

#define RGMII_TX_EXCESSIVE_LENGTH_DROP_LEN    32
#define RGMII_TX_EXCESSIVE_LENGTH_DROP_OFFSET 0

#define RGMII_TX_UNDERRUN_LEN    32
#define RGMII_TX_UNDERRUN_OFFSET 0

#define RGMII_TX_TAGGED_LEN    32
#define RGMII_TX_TAGGED_OFFSET 0

#define RGMII_TX_CRC_ERROR_LEN    32
#define RGMII_TX_CRC_ERROR_OFFSET 0

#define RGMII_TX_PAUSE_FRAMES_LEN    32
#define RGMII_TX_PAUSE_FRAMES_OFFSET 0

#define RGMII_LINE_LOOP_BACK_LEN    1
#define RGMII_LINE_LOOP_BACK_OFFSET 0

#define RGMII_CF_CRC_STRIP_LEN    1
#define RGMII_CF_CRC_STRIP_OFFSET 0

#define RGMII_MODE_CHANGE_EN_LEN    1
#define RGMII_MODE_CHANGE_EN_OFFSET 0

#define RGMII_CF2BC_SLOTTIME_LEN       16
#define RGMII_CF2BC_SLOTTIME_OFFSET    8
#define RGMII_CF2BC_RANDOM_SEED_LEN    8
#define RGMII_CF2BC_RANDOM_SEED_OFFSET 0

#define RGMII_CF2MI_LOOPBACK_EN_LEN    1
#define RGMII_CF2MI_LOOPBACK_EN_OFFSET 2
#define RGMII_CF_EXT_DRIVE_LP_LEN      1
#define RGMII_CF_EXT_DRIVE_LP_OFFSET   1

#define RGMII_RUNT_PKT_EN_LEN           1
#define RGMII_RUNT_PKT_EN_OFFSET        4
#define RGMII_STRIP_PAD_EN_LEN          1
#define RGMII_STRIP_PAD_EN_OFFSET       3
#define RGMII_CF2DF_TWO_PART_DFL_LEN    1
#define RGMII_CF2DF_TWO_PART_DFL_OFFSET 2
#define RGMII_CF_SILENT_MODE_LEN        1
#define RGMII_CF_SILENT_MODE_OFFSET     0

#define RGMII_CF_VLAN_CODE_LEN    16
#define RGMII_CF_VLAN_CODE_OFFSET 0

#define RGMII_RX_OVERRUN_CNT_LEN    32
#define RGMII_RX_OVERRUN_CNT_OFFSET 0

#define RGMII_RX_LATE_COL_CNT_LEN    32
#define RGMII_RX_LATE_COL_CNT_OFFSET 0

#define RGMII_RX_LENGTHFIELD_ERR_CNT_LEN    32
#define RGMII_RX_LENGTHFIELD_ERR_CNT_OFFSET 0

#define RGMII_CRF_TX_MAX_PACKET_LEN    11
#define RGMII_CRF_TX_MAX_PACKET_OFFSET 16

#define RGMII_RSS_EN_VERISION_LEN      1
#define RGMII_RSS_EN_VERISION_OFFSET   31
#define RGMII_HASH_EN_VERISION_LEN     1
#define RGMII_HASH_EN_VERISION_OFFSET  30
#define RGMII_TSO_VERSION_LEN          2
#define RGMII_TSO_VERSION_OFFSET       28
#define RGMII_CRF_TX_MIN_PACKET_LEN    6
#define RGMII_CRF_TX_MIN_PACKET_OFFSET 8
#define RGMII_CRF_RX_MIN_PACKET_LEN    6
#define RGMII_CRF_RX_MIN_PACKET_OFFSET 0

#define RGMII_CRF_TX_STANDARD_LEN        1
#define RGMII_CRF_TX_STANDARD_OFFSET     25
#define RGMII_CRF_IP_FLOW_CTRL_LEN       1
#define RGMII_CRF_IP_FLOW_CTRL_OFFSET    21
#define RGMII_CRF_FILT_UNUSED_PKG_LEN    1
#define RGMII_CRF_FILT_UNUSED_PKG_OFFSET 17
#define RGMII_CRF_BM_FLOW_CTRL_LEN       1
#define RGMII_CRF_BM_FLOW_CTRL_OFFSET    16
#define RGMII_CRF_LARGE_PACKET_LEN       14
#define RGMII_CRF_LARGE_PACKET_OFFSET    0

#define RGMII_CRF_IP_PKG_THRSLD_LEN    16
#define RGMII_CRF_IP_PKG_THRSLD_OFFSET 16

#define RGMII_CRF_FLOW_TIME_THRSLD_LEN    8
#define RGMII_CRF_FLOW_TIME_THRSLD_OFFSET 0

#define RGMII_CRF_TX_P_FULL_TH_LEN     11
#define RGMII_CRF_TX_P_FULL_TH_OFFSET  16
#define RGMII_CRF_TX_P_EMPTY_TH_LEN    11
#define RGMII_CRF_TX_P_EMPTY_TH_OFFSET 0

#define RGMII_CRF_RX_P_FULL_TH_LEN     12
#define RGMII_CRF_RX_P_FULL_TH_OFFSET  16
#define RGMII_CRF_RX_P_EMPTY_TH_LEN    12
#define RGMII_CRF_RX_P_EMPTY_TH_OFFSET 0

#define RGMII_ERR_GIVEN_PKG_CNT_LEN    32
#define RGMII_ERR_GIVEN_PKG_CNT_OFFSET 0

#define RGMII_SHORT_ERR_PKT_CNT_LEN    32
#define RGMII_SHORT_ERR_PKT_CNT_OFFSET 0

#define RGMII_OVER_FLOW_CNT_LEN    32
#define RGMII_OVER_FLOW_CNT_OFFSET 0

#define RGMII_OVER_LENGTH_CNT_LEN    32
#define RGMII_OVER_LENGTH_CNT_OFFSET 0

#define RGMII_TX_CTRL_ST_LEN    2
#define RGMII_TX_CTRL_ST_OFFSET 0

#define RGMII_CFF_CRF_TX_FULL_LEN     1
#define RGMII_CFF_CRF_TX_FULL_OFFSET  11
#define RGMII_CFF_CRF_TX_EMPTY_LEN    1
#define RGMII_CFF_CRF_TX_EMPTY_OFFSET 10
#define RGMII_CFF_CRF_RX_FULL_LEN     1
#define RGMII_CFF_CRF_RX_FULL_OFFSET  9
#define RGMII_CFF_CRF_RX_EMPTY_LEN    1
#define RGMII_CFF_CRF_RX_EMPTY_OFFSET 8
#define RGMII_RFF_CRF_P_EMPTY_LEN     1
#define RGMII_RFF_CRF_P_EMPTY_OFFSET  7
#define RGMII_RFF_CRF_EMPTY_LEN       1
#define RGMII_RFF_CRF_EMPTY_OFFSET    6
#define RGMII_RFF_CRF_P_FULL_LEN      1
#define RGMII_RFF_CRF_P_FULL_OFFSET   5
#define RGMII_RFF_CRF_FULL_LEN        1
#define RGMII_RFF_CRF_FULL_OFFSET     4
#define RGMII_TFF_CRF_P_EMPTY_LEN     1
#define RGMII_TFF_CRF_P_EMPTY_OFFSET  3
#define RGMII_TFF_CRF_EMPTY_LEN       1
#define RGMII_TFF_CRF_EMPTY_OFFSET    2
#define RGMII_TFF_CRF_P_FULL_LEN      1
#define RGMII_TFF_CRF_P_FULL_OFFSET   1
#define RGMII_TFF_CRF_FULL_LEN        1
#define RGMII_TFF_CRF_FULL_OFFSET     0

#define RGMII_RX_FIFO_PAUSE_EN_LEN    1
#define RGMII_RX_FIFO_PAUSE_EN_OFFSET 2
#define RGMII_RX_BQ_PAUSE_EN_LEN      1
#define RGMII_RX_BQ_PAUSE_EN_OFFSET   1
#define RGMII_RX_FQ_PAUSE_EN_LEN      1
#define RGMII_RX_FQ_PAUSE_EN_OFFSET   0

#define RGMII_CRF_RX_CFG_NUM_LEN    16
#define RGMII_CRF_RX_CFG_NUM_OFFSET 16

#define RGMII_NFRAG_MAX_LEN_LEN            16
#define RGMII_NFRAG_MAX_LEN_OFFSET         16
#define RGMII_COE_DROP_CNT_EN_LEN          1
#define RGMII_COE_DROP_CNT_EN_OFFSET       7
#define RGMII_COE_IPV6UDP_ZERO_DROP_LEN    1
#define RGMII_COE_IPV6UDP_ZERO_DROP_OFFSET 6
#define RGMII_COE_PAYLOAD_DROP_LEN         1
#define RGMII_COE_PAYLOAD_DROP_OFFSET      5
#define RGMII_COE_IPHEAD_DROP_LEN          1
#define RGMII_COE_IPHEAD_DROP_OFFSET       4
#define RGMII_TSO_DEBUG_FLAG_LEN           1
#define RGMII_TSO_DEBUG_FLAG_OFFSET        0

#define RGMII_RX_COE_IPV4HEAD_RSLDATA_LEN    17
#define RGMII_RX_COE_IPV4HEAD_RSLDATA_OFFSET 0

#define RGMII_RX_COE_UDP_LEN                  1
#define RGMII_RX_COE_UDP_OFFSET               26
#define RGMII_RX_COE_TCP_LEN                  1
#define RGMII_RX_COE_TCP_OFFSET               25
#define RGMII_RX_COE_IPV4_FLAG_LEN            1
#define RGMII_RX_COE_IPV4_FLAG_OFFSET         24
#define RGMII_RX_COE_CURR_ST_LEN              3
#define RGMII_RX_COE_CURR_ST_OFFSET           20
#define RGMII_RX_COE_IPPAYLOAD_RSLDATA_LEN    17
#define RGMII_RX_COE_IPPAYLOAD_RSLDATA_OFFSET 0

#define RGMII_RX_COE_DROP_CNT_LEN    32
#define RGMII_RX_COE_DROP_CNT_OFFSET 0

#define RGMII_RX_COE_PKT_CNT_LEN    32
#define RGMII_RX_COE_PKT_CNT_OFFSET 0

#define RGMII_CRF_TX_PAUSE_AUTO_LEN    1
#define RGMII_CRF_TX_PAUSE_AUTO_OFFSET 0

#define RGMII_CRF_RX_LEFT_NUM_LEN    8
#define RGMII_CRF_RX_LEFT_NUM_OFFSET 0

#define RGMII_CRF_BM_PKT_THRSLD_LEN    16
#define RGMII_CRF_BM_PKT_THRSLD_OFFSET 0

#define RGMII_CRF_BM_TIME_THRSLD_LEN    20
#define RGMII_CRF_BM_TIME_THRSLD_OFFSET 0

#define RGMII_TSO_PKT_CNT_LEN    32
#define RGMII_TSO_PKT_CNT_OFFSET 0

#define RGMII_TSO_PKT_EXC_CNT_LEN    32
#define RGMII_TSO_PKT_EXC_CNT_OFFSET 0

#define RGMII_TX_PKT_CNT_DEBUG_LEN    32
#define RGMII_TX_PKT_CNT_DEBUG_OFFSET 0

#define RGMII_TX_ERRPKT_CNT_DEBUG_LEN    32
#define RGMII_TX_ERRPKT_CNT_DEBUG_OFFSET 0

#define RGMII_MDIO_CMD_LEN    1
#define RGMII_MDIO_CMD_OFFSET 20
#define RGMII_OP_CODE_LEN     2
#define RGMII_OP_CODE_OFFSET  16
#define RGMII_PHY_ADDR_LEN    5
#define RGMII_PHY_ADDR_OFFSET 8
#define RGMII_REG_ADDR_LEN    5
#define RGMII_REG_ADDR_OFFSET 0

#define RGMII_MDIO_RD_DATA_LEN    16
#define RGMII_MDIO_RD_DATA_OFFSET 16
#define RGMII_MDIO_WR_DATA_LEN    16
#define RGMII_MDIO_WR_DATA_OFFSET 0

#define RGMII_MDC_REVERSE_LEN    1
#define RGMII_MDC_REVERSE_OFFSET 4
#define RGMII_MDC_SPEED_LEN      1
#define RGMII_MDC_SPEED_OFFSET   0

#define RGMII_FQ_START_ADDR_LOW_LEN    32
#define RGMII_FQ_START_ADDR_LOW_OFFSET 0

#define RGMII_FQ_START_ADDR_HIGH_LEN    8
#define RGMII_FQ_START_ADDR_HIGH_OFFSET 24
#define RGMII_FQ_DEPTH_LEN              19
#define RGMII_FQ_DEPTH_OFFSET           0

#define RGMII_FQ_WR_ADDR_LEN    21
#define RGMII_FQ_WR_ADDR_OFFSET 0

#define RGMII_FQ_RD_ADDR_LEN    21
#define RGMII_FQ_RD_ADDR_OFFSET 0

#define RGMII_FQ_VLDDESC_CNT_LEN    16
#define RGMII_FQ_VLDDESC_CNT_OFFSET 0

#define RGMII_FQ_PAUSE_LOW_TH_LEN    16
#define RGMII_FQ_PAUSE_LOW_TH_OFFSET 16
#define RGMII_FQ_ALEMPTY_TH_LEN      16
#define RGMII_FQ_ALEMPTY_TH_OFFSET   0

#define RGMII_RX_FQ_START_ADDR_EN_LEN    1
#define RGMII_RX_FQ_START_ADDR_EN_OFFSET 2
#define RGMII_RX_FQ_DEPTH_EN_LEN         1
#define RGMII_RX_FQ_DEPTH_EN_OFFSET      1
#define RGMII_RX_FQ_RD_ADDR_EN_LEN       1
#define RGMII_RX_FQ_RD_ADDR_EN_OFFSET    0

#define RGMII_FQ_PAUSE_HI_TH_LEN    16
#define RGMII_FQ_PAUSE_HI_TH_OFFSET 16
#define RGMII_FQ_ALFULL_TH_LEN      16
#define RGMII_FQ_ALFULL_TH_OFFSET   0

#define RGMII_RX_BQ_START_ADDR_LOW_LEN    32
#define RGMII_RX_BQ_START_ADDR_LOW_OFFSET 0

#define RGMII_RX_BQ_START_ADDR_HIGH_LEN    8
#define RGMII_RX_BQ_START_ADDR_HIGH_OFFSET 24
#define RGMII_RX_BQ_DEPTH_LEN              19
#define RGMII_RX_BQ_DEPTH_OFFSET           0

#define RGMII_RX_BQ_WR_ADDR_LEN    21
#define RGMII_RX_BQ_WR_ADDR_OFFSET 0

#define RGMII_RX_BQ_RD_ADDR_LEN    21
#define RGMII_RX_BQ_RD_ADDR_OFFSET 0

#define RGMII_RX_BQ_FREE_DESC_CNT_LEN    16
#define RGMII_RX_BQ_FREE_DESC_CNT_OFFSET 0

#define RGMII_RX_BQ_PAUSE_LOW_TH_LEN    16
#define RGMII_RX_BQ_PAUSE_LOW_TH_OFFSET 16
#define RGMII_RX_BQ_ALEMPTY_TH_LEN      16
#define RGMII_RX_BQ_ALEMPTY_TH_OFFSET   0

#define RGMII_RX_BQ_START_ADDR_EN_LEN    1
#define RGMII_RX_BQ_START_ADDR_EN_OFFSET 2
#define RGMII_RX_BQ_DEPTH_EN_LEN         1
#define RGMII_RX_BQ_DEPTH_EN_OFFSET      1
#define RGMII_RX_BQ_WR_ADDR_EN_LEN       1
#define RGMII_RX_BQ_WR_ADDR_EN_OFFSET    0

#define RGMII_RX_BQ_PAUSE_HI_TH_LEN    16
#define RGMII_RX_BQ_PAUSE_HI_TH_OFFSET 16
#define RGMII_RX_BQ_ALFULL_TH_LEN      16
#define RGMII_RX_BQ_ALFULL_TH_OFFSET   0

#define RGMII_TX_BQ_START_ADDR_LOW_LEN    32
#define RGMII_TX_BQ_START_ADDR_LOW_OFFSET 0

#define RGMII_TX_BQ_START_ADDR_HIGH_LEN    8
#define RGMII_TX_BQ_START_ADDR_HIGH_OFFSET 24
#define RGMII_TX_BQ_DEPTH_LEN              19
#define RGMII_TX_BQ_DEPTH_OFFSET           0

#define RGMII_TX_BQ_WR_ADDR_LEN    21
#define RGMII_TX_BQ_WR_ADDR_OFFSET 0

#define RGMII_TX_BQ_RD_ADDR_LEN    21
#define RGMII_TX_BQ_RD_ADDR_OFFSET 0

#define RGMII_TX_BQ_VLDDESC_CNT_LEN    16
#define RGMII_TX_BQ_VLDDESC_CNT_OFFSET 0

#define RGMII_TX_BQ_ALEMPTY_TH_LEN    16
#define RGMII_TX_BQ_ALEMPTY_TH_OFFSET 0

#define RGMII_TX_BQ_START_ADDR_EN_LEN    1
#define RGMII_TX_BQ_START_ADDR_EN_OFFSET 2
#define RGMII_TX_BQ_DEPTH_EN_LEN         1
#define RGMII_TX_BQ_DEPTH_EN_OFFSET      1
#define RGMII_TX_BQ_RD_ADDR_EN_LEN       1
#define RGMII_TX_BQ_RD_ADDR_EN_OFFSET    0

#define RGMII_BQ1_ALFULL_TH_LEN    16
#define RGMII_BQ1_ALFULL_TH_OFFSET 0

#define RGMII_TX_RQ_START_ADDR_LOW_LEN    32
#define RGMII_TX_RQ_START_ADDR_LOW_OFFSET 0

#define RGMII_TX_RQ_START_ADDR_HIGH_LEN    8
#define RGMII_TX_RQ_START_ADDR_HIGH_OFFSET 24
#define RGMII_TX_RQ_DEPTH_LEN              19
#define RGMII_TX_RQ_DEPTH_OFFSET           0

#define RGMII_TX_RQ_WR_ADDR_LEN    21
#define RGMII_TX_RQ_WR_ADDR_OFFSET 0

#define RGMII_TX_RQ_RD_ADDR_LEN    21
#define RGMII_TX_RQ_RD_ADDR_OFFSET 0

#define RGMII_TX_RQ_FREE_DESC_CNT_LEN    16
#define RGMII_TX_RQ_FREE_DESC_CNT_OFFSET 0

#define RGMII_TX_RQ_ALEMPTY_TH_LEN    16
#define RGMII_TX_RQ_ALEMPTY_TH_OFFSET 0

#define RGMII_TX_RQ_START_ADDR_EN_LEN    1
#define RGMII_TX_RQ_START_ADDR_EN_OFFSET 2
#define RGMII_TX_RQ_DEPTH_EN_LEN         1
#define RGMII_TX_RQ_DEPTH_EN_OFFSET      1
#define RGMII_TX_RQ_WR_ADDR_EN_LEN       1
#define RGMII_TX_RQ_WR_ADDR_EN_OFFSET    0

#define RGMII_TX_RQ_ALFULL_TH_LEN    16
#define RGMII_TX_RQ_ALFULL_TH_OFFSET 0

#define RGMII_RAW_MAC_FIFO_ERR_INT_LEN        1
#define RGMII_RAW_MAC_FIFO_ERR_INT_OFFSET     0
#define RGMII_RAW_TX_RQ_IN_TIMEOUT_INT_LEN    0
#define RGMII_RAW_TX_RQ_IN_TIMEOUT_INT_OFFSET 0
#define RGMII_RAW_RX_BQ_IN_TIMEOUT_INT_LEN    0
#define RGMII_RAW_RX_BQ_IN_TIMEOUT_INT_OFFSET 0
#define RGMII_RAW_TXOUTCFF_FULL_INT_LEN       0
#define RGMII_RAW_TXOUTCFF_FULL_INT_OFFSET    0
#define RGMII_RAW_TXOUTCFF_EMPTY_INT_LEN      0
#define RGMII_RAW_TXOUTCFF_EMPTY_INT_OFFSET   0
#define RGMII_RAW_TXCFF_FULL_INT_LEN          0
#define RGMII_RAW_TXCFF_FULL_INT_OFFSET       0
#define RGMII_RAW_TXCFF_EMPTY_INT_LEN         0
#define RGMII_RAW_TXCFF_EMPTY_INT_OFFSET      0
#define RGMII_RAW_RXOUTCFF_FULL_INT_LEN       0
#define RGMII_RAW_RXOUTCFF_FULL_INT_OFFSET    0
#define RGMII_RAW_RXOUTCFF_EMPTY_INT_LEN      0
#define RGMII_RAW_RXOUTCFF_EMPTY_INT_OFFSET   0
#define RGMII_RAW_RXCFF_FULL_INT_LEN          0
#define RGMII_RAW_RXCFF_FULL_INT_OFFSET       0
#define RGMII_RAW_RXCFF_EMPTY_INT_LEN         0
#define RGMII_RAW_RXCFF_EMPTY_INT_OFFSET      0
#define RGMII_RAW_TX_RQ_IN_INT_LEN            0
#define RGMII_RAW_TX_RQ_IN_INT_OFFSET         0
#define RGMII_RAW_TX_BQ_OUT_INT_LEN           0
#define RGMII_RAW_TX_BQ_OUT_INT_OFFSET        0
#define RGMII_RAW_RX_BQ_IN_INT_LEN            0
#define RGMII_RAW_RX_BQ_IN_INT_OFFSET         0
#define RGMII_RAW_RX_FQ_OUT_INT_LEN           0
#define RGMII_RAW_RX_FQ_OUT_INT_OFFSET        0
#define RGMII_RAW_TX_RQ_EMPTY_INT_LEN         0
#define RGMII_RAW_TX_RQ_EMPTY_INT_OFFSET      0
#define RGMII_RAW_TX_RQ_FULL_INT_LEN          0
#define RGMII_RAW_TX_RQ_FULL_INT_OFFSET       0
#define RGMII_RAW_TX_RQ_ALEMPTY_INT_LEN       0
#define RGMII_RAW_TX_RQ_ALEMPTY_INT_OFFSET    0
#define RGMII_RAW_TX_RQ_ALFULL_INT_LEN        0
#define RGMII_RAW_TX_RQ_ALFULL_INT_OFFSET     0
#define RGMII_RAW_TX_BQ_EMPTY_INT_LEN         0
#define RGMII_RAW_TX_BQ_EMPTY_INT_OFFSET      0
#define RGMII_RAW_TX_BQ_FULL_INT_LEN          0
#define RGMII_RAW_TX_BQ_FULL_INT_OFFSET       0
#define RGMII_RAW_TX_BQ_ALEMPTY_INT_LEN       0
#define RGMII_RAW_TX_BQ_ALEMPTY_INT_OFFSET    0
#define RGMII_RAW_TX_BQ_ALFULL_INT_LEN        0
#define RGMII_RAW_TX_BQ_ALFULL_INT_OFFSET     0
#define RGMII_RAW_RX_BQ_EMPTY_INT_LEN         0
#define RGMII_RAW_RX_BQ_EMPTY_INT_OFFSET      0
#define RGMII_RAW_RX_BQ_FULL_INT_LEN          0
#define RGMII_RAW_RX_BQ_FULL_INT_OFFSET       0
#define RGMII_RAW_RX_BQ_ALEMPTY_INT_LEN       0
#define RGMII_RAW_RX_BQ_ALEMPTY_INT_OFFSET    0
#define RGMII_RAW_RX_BQ_ALFULL_INT_LEN        0
#define RGMII_RAW_RX_BQ_ALFULL_INT_OFFSET     0
#define RGMII_RAW_RX_FQ_EMPTY_INT_LEN         0
#define RGMII_RAW_RX_FQ_EMPTY_INT_OFFSET      0
#define RGMII_RAW_RX_FQ_FULL_INT_LEN          0
#define RGMII_RAW_RX_FQ_FULL_INT_OFFSET       0
#define RGMII_RAW_RX_FQ_ALEMPTY_INT_LEN       0
#define RGMII_RAW_RX_FQ_ALEMPTY_INT_OFFSET    0
#define RGMII_RAW_RX_FQ_ALFULL_INT_LEN        0
#define RGMII_RAW_RX_FQ_ALFULL_INT_OFFSET     0

#define RGMII_ENA_MAC_FIFO_ERR_INT_LEN        1
#define RGMII_ENA_MAC_FIFO_ERR_INT_OFFSET     0
#define RGMII_ENA_TX_RQ_IN_TIMEOUT_INT_LEN    0
#define RGMII_ENA_TX_RQ_IN_TIMEOUT_INT_OFFSET 0
#define RGMII_ENA_RX_BQ_IN_TIMEOUT_INT_LEN    0
#define RGMII_ENA_RX_BQ_IN_TIMEOUT_INT_OFFSET 0
#define RGMII_ENA_TXOUTCFF_FULL_INT_LEN       0
#define RGMII_ENA_TXOUTCFF_FULL_INT_OFFSET    0
#define RGMII_ENA_TXOUTCFF_EMPTY_INT_LEN      0
#define RGMII_ENA_TXOUTCFF_EMPTY_INT_OFFSET   0
#define RGMII_ENA_TXCFF_FULL_INT_LEN          0
#define RGMII_ENA_TXCFF_FULL_INT_OFFSET       0
#define RGMII_ENA_TXCFF_EMPTY_INT_LEN         0
#define RGMII_ENA_TXCFF_EMPTY_INT_OFFSET      0
#define RGMII_ENA_RXOUTCFF_FULL_INT_LEN       0
#define RGMII_ENA_RXOUTCFF_FULL_INT_OFFSET    0
#define RGMII_ENA_RXOUTCFF_EMPTY_INT_LEN      0
#define RGMII_ENA_RXOUTCFF_EMPTY_INT_OFFSET   0
#define RGMII_ENA_RXCFF_FULL_INT_LEN          0
#define RGMII_ENA_RXCFF_FULL_INT_OFFSET       0
#define RGMII_ENA_RXCFF_EMPTY_INT_LEN         0
#define RGMII_ENA_RXCFF_EMPTY_INT_OFFSET      0
#define RGMII_ENA_TX_RQ_IN_INT_LEN            0
#define RGMII_ENA_TX_RQ_IN_INT_OFFSET         0
#define RGMII_ENA_TX_BQ_OUT_INT_LEN           0
#define RGMII_ENA_TX_BQ_OUT_INT_OFFSET        0
#define RGMII_ENA_RX_BQ_IN_INT_LEN            0
#define RGMII_ENA_RX_BQ_IN_INT_OFFSET         0
#define RGMII_ENA_RX_FQ_OUT_INT_LEN           0
#define RGMII_ENA_RX_FQ_OUT_INT_OFFSET        0
#define RGMII_ENA_TX_RQ_EMPTY_INT_LEN         0
#define RGMII_ENA_TX_RQ_EMPTY_INT_OFFSET      0
#define RGMII_ENA_TX_RQ_FULL_INT_LEN          0
#define RGMII_ENA_TX_RQ_FULL_INT_OFFSET       0
#define RGMII_ENA_TX_RQ_ALEMPTY_INT_LEN       0
#define RGMII_ENA_TX_RQ_ALEMPTY_INT_OFFSET    0
#define RGMII_ENA_TX_RQ_ALFULL_INT_LEN        0
#define RGMII_ENA_TX_RQ_ALFULL_INT_OFFSET     0
#define RGMII_ENA_TX_BQ_EMPTY_INT_LEN         0
#define RGMII_ENA_TX_BQ_EMPTY_INT_OFFSET      0
#define RGMII_ENA_TX_BQ_FULL_INT_LEN          0
#define RGMII_ENA_TX_BQ_FULL_INT_OFFSET       0
#define RGMII_ENA_TX_BQ_ALEMPTY_INT_LEN       0
#define RGMII_ENA_TX_BQ_ALEMPTY_INT_OFFSET    0
#define RGMII_ENA_TX_BQ_ALFULL_INT_LEN        0
#define RGMII_ENA_TX_BQ_ALFULL_INT_OFFSET     0
#define RGMII_ENA_RX_BQ_EMPTY_INT_LEN         0
#define RGMII_ENA_RX_BQ_EMPTY_INT_OFFSET      0
#define RGMII_ENA_RX_BQ_FULL_INT_LEN          0
#define RGMII_ENA_RX_BQ_FULL_INT_OFFSET       0
#define RGMII_ENA_RX_BQ_ALEMPTY_INT_LEN       0
#define RGMII_ENA_RX_BQ_ALEMPTY_INT_OFFSET    0
#define RGMII_ENA_RX_BQ_ALFULL_INT_LEN        0
#define RGMII_ENA_RX_BQ_ALFULL_INT_OFFSET     0
#define RGMII_ENA_RX_FQ_EMPTY_INT_LEN         0
#define RGMII_ENA_RX_FQ_EMPTY_INT_OFFSET      0
#define RGMII_ENA_RX_FQ_FULL_INT_LEN          0
#define RGMII_ENA_RX_FQ_FULL_INT_OFFSET       0
#define RGMII_ENA_RX_FQ_ALEMPTY_INT_LEN       0
#define RGMII_ENA_RX_FQ_ALEMPTY_INT_OFFSET    0
#define RGMII_ENA_RX_FQ_ALFULL_INT_LEN        0
#define RGMII_ENA_RX_FQ_ALFULL_INT_OFFSET     0

#define RGMII_STATUS_MAC_FIFO_ERR_INT_LEN        1
#define RGMII_STATUS_MAC_FIFO_ERR_INT_OFFSET     0
#define RGMII_STATUS_TX_RQ_IN_TIMEOUT_INT_LEN    0
#define RGMII_STATUS_TX_RQ_IN_TIMEOUT_INT_OFFSET 0
#define RGMII_STATUS_RX_BQ_IN_TIMEOUT_INT_LEN    0
#define RGMII_STATUS_RX_BQ_IN_TIMEOUT_INT_OFFSET 0
#define RGMII_STATUS_TXOUTCFF_FULL_INT_LEN       0
#define RGMII_STATUS_TXOUTCFF_FULL_INT_OFFSET    0
#define RGMII_STATUS_TXOUTCFF_EMPTY_INT_LEN      0
#define RGMII_STATUS_TXOUTCFF_EMPTY_INT_OFFSET   0
#define RGMII_STATUS_TXCFF_FULL_INT_LEN          0
#define RGMII_STATUS_TXCFF_FULL_INT_OFFSET       0
#define RGMII_STATUS_TXCFF_EMPTY_INT_LEN         0
#define RGMII_STATUS_TXCFF_EMPTY_INT_OFFSET      0
#define RGMII_STATUS_RXOUTCFF_FULL_INT_LEN       0
#define RGMII_STATUS_RXOUTCFF_FULL_INT_OFFSET    0
#define RGMII_STATUS_RXOUTCFF_EMPTY_INT_LEN      0
#define RGMII_STATUS_RXOUTCFF_EMPTY_INT_OFFSET   0
#define RGMII_STATUS_RXCFF_FULL_INT_LEN          0
#define RGMII_STATUS_RXCFF_FULL_INT_OFFSET       0
#define RGMII_STATUS_RXCFF_EMPTY_INT_LEN         0
#define RGMII_STATUS_RXCFF_EMPTY_INT_OFFSET      0
#define RGMII_STATUS_TX_RQ_IN_INT_LEN            0
#define RGMII_STATUS_TX_RQ_IN_INT_OFFSET         0
#define RGMII_STATUS_TX_BQ_OUT_INT_LEN           0
#define RGMII_STATUS_TX_BQ_OUT_INT_OFFSET        0
#define RGMII_STATUS_RX_BQ_IN_INT_LEN            0
#define RGMII_STATUS_RX_BQ_IN_INT_OFFSET         0
#define RGMII_STATUS_RX_FQ_OUT_INT_LEN           0
#define RGMII_STATUS_RX_FQ_OUT_INT_OFFSET        0
#define RGMII_STATUS_TX_RQ_EMPTY_INT_LEN         0
#define RGMII_STATUS_TX_RQ_EMPTY_INT_OFFSET      0
#define RGMII_STATUS_TX_RQ_FULL_INT_LEN          0
#define RGMII_STATUS_TX_RQ_FULL_INT_OFFSET       0
#define RGMII_STATUS_TX_RQ_ALEMPTY_INT_LEN       0
#define RGMII_STATUS_TX_RQ_ALEMPTY_INT_OFFSET    0
#define RGMII_STATUS_TX_RQ_ALFULL_INT_LEN        0
#define RGMII_STATUS_TX_RQ_ALFULL_INT_OFFSET     0
#define RGMII_STATUS_TX_BQ_EMPTY_INT_LEN         0
#define RGMII_STATUS_TX_BQ_EMPTY_INT_OFFSET      0
#define RGMII_STATUS_TX_BQ_FULL_INT_LEN          0
#define RGMII_STATUS_TX_BQ_FULL_INT_OFFSET       0
#define RGMII_STATUS_TX_BQ_ALEMPTY_INT_LEN       0
#define RGMII_STATUS_TX_BQ_ALEMPTY_INT_OFFSET    0
#define RGMII_STATUS_TX_BQ_ALFULL_INT_LEN        0
#define RGMII_STATUS_TX_BQ_ALFULL_INT_OFFSET     0
#define RGMII_STATUS_RX_BQ_EMPTY_INT_LEN         0
#define RGMII_STATUS_RX_BQ_EMPTY_INT_OFFSET      0
#define RGMII_STATUS_RX_BQ_FULL_INT_LEN          0
#define RGMII_STATUS_RX_BQ_FULL_INT_OFFSET       0
#define RGMII_STATUS_RX_BQ_ALEMPTY_INT_LEN       0
#define RGMII_STATUS_RX_BQ_ALEMPTY_INT_OFFSET    0
#define RGMII_STATUS_RX_BQ_ALFULL_INT_LEN        0
#define RGMII_STATUS_RX_BQ_ALFULL_INT_OFFSET     0
#define RGMII_STATUS_RX_FQ_EMPTY_INT_LEN         0
#define RGMII_STATUS_RX_FQ_EMPTY_INT_OFFSET      0
#define RGMII_STATUS_RX_FQ_FULL_INT_LEN          0
#define RGMII_STATUS_RX_FQ_FULL_INT_OFFSET       0
#define RGMII_STATUS_RX_FQ_ALEMPTY_INT_LEN       0
#define RGMII_STATUS_RX_FQ_ALEMPTY_INT_OFFSET    0
#define RGMII_STATUS_RX_FQ_ALFULL_INT_LEN        0
#define RGMII_STATUS_RX_FQ_ALFULL_INT_OFFSET     0

#define RGMII_RX_OUTCFF_WR_DESC_ENA_LEN    1
#define RGMII_RX_OUTCFF_WR_DESC_ENA_OFFSET 3
#define RGMII_RX_CFF_RD_DESC_ENA_LEN       1
#define RGMII_RX_CFF_RD_DESC_ENA_OFFSET    2
#define RGMII_TX_OUTCFF_WR_DESC_ENA_LEN    1
#define RGMII_TX_OUTCFF_WR_DESC_ENA_OFFSET 1
#define RGMII_TX_CFF_RD_DESC_ENA_LEN       1
#define RGMII_TX_CFF_RD_DESC_ENA_OFFSET    0

#define RGMII_TX_RQ_IN_TH_LEN    8
#define RGMII_TX_RQ_IN_TH_OFFSET 16
#define RGMII_RX_BQ_IN_TH_LEN    8
#define RGMII_RX_BQ_IN_TH_OFFSET 0

#define RGMII_TX_BQ_OUT_TH_LEN    8
#define RGMII_TX_BQ_OUT_TH_OFFSET 16
#define RGMII_RX_FQ_OUT_TH_LEN    8
#define RGMII_RX_FQ_OUT_TH_OFFSET 0

#define RGMII_RX_BQ_IN_TIMEOUT_TH_LEN    24
#define RGMII_RX_BQ_IN_TIMEOUT_TH_OFFSET 0

#define RGMII_TX_RQ_IN_TIMEOUT_TH_LEN    24
#define RGMII_TX_RQ_IN_TIMEOUT_TH_OFFSET 0

#define RGMII_TX_STOP_EN_LEN    1
#define RGMII_TX_STOP_EN_OFFSET 1
#define RGMII_RX_STOP_EN_LEN    1
#define RGMII_RX_STOP_EN_OFFSET 0

#define RGMII_TX_FLUSH_CMD_LEN          1
#define RGMII_TX_FLUSH_CMD_OFFSET       5
#define RGMII_RX_FLUSH_CMD_LEN          1
#define RGMII_RX_FLUSH_CMD_OFFSET       4
#define RGMII_TX_FLUSH_FLAG_DOWN_LEN    1
#define RGMII_TX_FLUSH_FLAG_DOWN_OFFSET 3
#define RGMII_TX_FLUSH_FLAG_UP_LEN      1
#define RGMII_TX_FLUSH_FLAG_UP_OFFSET   2
#define RGMII_RX_FLUSH_FLAG_DOWN_LEN    1
#define RGMII_RX_FLUSH_FLAG_DOWN_OFFSET 1
#define RGMII_RX_FLUSH_FLAG_UP_LEN      1
#define RGMII_RX_FLUSH_FLAG_UP_OFFSET   0

#define RGMII_TX_MOVE_CURR_ST_LEN    4
#define RGMII_TX_MOVE_CURR_ST_OFFSET 8
#define RGMII_RX_MG_CURR_ST_LEN      5
#define RGMII_RX_MG_CURR_ST_OFFSET   0

#define RGMII_EEE_CLOSE_CLK_EN_LEN       1
#define RGMII_EEE_CLOSE_CLK_EN_OFFSET    21
#define RGMII_EEE_CLOSE_CLK_EN_MC_LEN    1
#define RGMII_EEE_CLOSE_CLK_EN_MC_OFFSET 20
#define RGMII_EEE_CLK_SYSLES_LEN         4
#define RGMII_EEE_CLK_SYSLES_OFFSET      16
#define RGMII_TX_LPI_COND_LEN            1
#define RGMII_TX_LPI_COND_OFFSET         4
#define RGMII_RX_LEAVE_LPI_LEN           1
#define RGMII_RX_LEAVE_LPI_OFFSET        3
#define RGMII_RX_ENTRY_LPI_LEN           1
#define RGMII_RX_ENTRY_LPI_OFFSET        2
#define RGMII_TX_LEAVE_LPI_LEN           1
#define RGMII_TX_LEAVE_LPI_OFFSET        1
#define RGMII_TX_ENTRY_LPI_LEN           1
#define RGMII_TX_ENTRY_LPI_OFFSET        0

#define RGMII_TX_LPI_COND_MSK_LEN     1
#define RGMII_TX_LPI_COND_MSK_OFFSET  9
#define RGMII_RX_LEAVE_LPI_MSK_LEN    1
#define RGMII_RX_LEAVE_LPI_MSK_OFFSET 8
#define RGMII_RX_ENTRY_LPI_MSK_LEN    1
#define RGMII_RX_ENTRY_LPI_MSK_OFFSET 7
#define RGMII_TX_LEAVE_LPI_MSK_LEN    1
#define RGMII_TX_LEAVE_LPI_MSK_OFFSET 6
#define RGMII_TX_ENTRY_LPI_MSK_LEN    1
#define RGMII_TX_ENTRY_LPI_MSK_OFFSET 5
#define RGMII_TX_LPI_COND_EN_LEN      1
#define RGMII_TX_LPI_COND_EN_OFFSET   4
#define RGMII_RX_LEAVE_LPI_EN_LEN     1
#define RGMII_RX_LEAVE_LPI_EN_OFFSET  3
#define RGMII_RX_ENTRY_LPI_EN_LEN     1
#define RGMII_RX_ENTRY_LPI_EN_OFFSET  2
#define RGMII_TX_LEAVE_LPI_EN_LEN     1
#define RGMII_TX_LEAVE_LPI_EN_OFFSET  1
#define RGMII_TX_ENTRY_LPI_EN_LEN     1
#define RGMII_TX_ENTRY_LPI_EN_OFFSET  0

#define RGMII_EEE_LS_TIMER_LEN      28
#define RGMII_EEE_LS_TIMER_OFFSET   4
#define RGMII_GMII_MODE_LEN         1
#define RGMII_GMII_MODE_OFFSET      3
#define RGMII_COND_INTR_KEEP_LEN    1
#define RGMII_COND_INTR_KEEP_OFFSET 2
#define RGMII_TX_LPI_ASSERT_LEN     1
#define RGMII_TX_LPI_ASSERT_OFFSET  1
#define RGMII_EEE_ENABLE_LEN        1
#define RGMII_EEE_ENABLE_OFFSET     0

#define RGMII_LPI_TW_TIMER_LEN      16
#define RGMII_LPI_TW_TIMER_OFFSET   16
#define RGMII_LPI_COND_TIMER_LEN    16
#define RGMII_LPI_COND_TIMER_OFFSET 0

#define RGMII_INTR_CNT_LEN                16
#define RGMII_INTR_CNT_OFFSET             16
#define RGMII_EEE_TX_LPI_STAY_LEN         1
#define RGMII_EEE_TX_LPI_STAY_OFFSET      15
#define RGMII_EEE_RX_LPI_STAY_FF3_LEN     1
#define RGMII_EEE_RX_LPI_STAY_FF3_OFFSET  14
#define RGMII_VERSION_LEN                 10
#define RGMII_VERSION_OFFSET              4
#define RGMII_EEE_AUTO_LEN                1
#define RGMII_EEE_AUTO_OFFSET             2
#define RGMII_EEE_HOLD_TXDESC_READ_LEN    1
#define RGMII_EEE_HOLD_TXDESC_READ_OFFSET 1
#define RGMII_PHY_LINK_STS_LEN            1
#define RGMII_PHY_LINK_STS_OFFSET         0

#define RGMII_CLK_PERIOD_CNT_LEN    8
#define RGMII_CLK_PERIOD_CNT_OFFSET 0

#define RGMII_SCR_WKUPFRM_GLBUCAST_LEN    1
#define RGMII_SCR_WKUPFRM_GLBUCAST_OFFSET 9
#define RGMII_RCVD_WKUP_FRM_LEN           1
#define RGMII_RCVD_WKUP_FRM_OFFSET        6
#define RGMII_RCVD_MGK_PKT_LEN            1
#define RGMII_RCVD_MGK_PKT_OFFSET         5
#define RGMII_SCR_INTR_EN_LEN             1
#define RGMII_SCR_INTR_EN_OFFSET          3
#define RGMII_SCR_WKUPFRM_EN_LEN          1
#define RGMII_SCR_WKUPFRM_EN_OFFSET       2
#define RGMII_SCR_MGKPKT_EN_LEN           1
#define RGMII_SCR_MGKPKT_EN_OFFSET        1
#define RGMII_SCR_POWER_DOWN_LEN          1
#define RGMII_SCR_POWER_DOWN_OFFSET       0

#define RGMII_WKUPFRM_FILTER0BYTEMSK_LEN    32
#define RGMII_WKUPFRM_FILTER0BYTEMSK_OFFSET 0

#define RGMII_WKUPFRM_FILTER1BYTEMSK_LEN    32
#define RGMII_WKUPFRM_FILTER1BYTEMSK_OFFSET 0

#define RGMII_WKUPFRM_FILTER2BYTEMSK_LEN    32
#define RGMII_WKUPFRM_FILTER2BYTEMSK_OFFSET 0

#define RGMII_WKUPFRM_FILTER3BYTEMSK_LEN    32
#define RGMII_WKUPFRM_FILTER3BYTEMSK_OFFSET 0

#define RGMII_WKUPFRM_FILTER3MCAST_LEN    1
#define RGMII_WKUPFRM_FILTER3MCAST_OFFSET 27
#define RGMII_WKUPFRM_FILTER3EN_LEN       1
#define RGMII_WKUPFRM_FILTER3EN_OFFSET    24
#define RGMII_WKUPFRM_FILTER2MCAST_LEN    1
#define RGMII_WKUPFRM_FILTER2MCAST_OFFSET 19
#define RGMII_WKUPFRM_FILTER2EN_LEN       1
#define RGMII_WKUPFRM_FILTER2EN_OFFSET    16
#define RGMII_WKUPFRM_FILTER1MCAST_LEN    1
#define RGMII_WKUPFRM_FILTER1MCAST_OFFSET 11
#define RGMII_WKUPFRM_FILTER1EN_LEN       1
#define RGMII_WKUPFRM_FILTER1EN_OFFSET    8
#define RGMII_WKUPFRM_FILTER0MCAST_LEN    1
#define RGMII_WKUPFRM_FILTER0MCAST_OFFSET 3
#define RGMII_WKUPFRM_FILTER0EN_LEN       1
#define RGMII_WKUPFRM_FILTER0EN_OFFSET    0

#define RGMII_WKUPFRM_FILTER3OFFSET_LEN    8
#define RGMII_WKUPFRM_FILTER3OFFSET_OFFSET 24
#define RGMII_WKUPFRM_FILTER2OFFSET_LEN    8
#define RGMII_WKUPFRM_FILTER2OFFSET_OFFSET 16
#define RGMII_WKUPFRM_FILTER1OFFSET_LEN    8
#define RGMII_WKUPFRM_FILTER1OFFSET_OFFSET 8
#define RGMII_WKUPFRM_FILTER0OFFSET_LEN    8
#define RGMII_WKUPFRM_FILTER0OFFSET_OFFSET 0

#define RGMII_WKUPFRM_FILTER1CRC_LEN    16
#define RGMII_WKUPFRM_FILTER1CRC_OFFSET 16
#define RGMII_WKUPFRM_FILTER0CRC_LEN    16
#define RGMII_WKUPFRM_FILTER0CRC_OFFSET 0

#define RGMII_WKUPFRM_FILTER3CRC_LEN    16
#define RGMII_WKUPFRM_FILTER3CRC_OFFSET 16
#define RGMII_WKUPFRM_FILTER2CRC_LEN    16
#define RGMII_WKUPFRM_FILTER2CRC_OFFSET 0

#define RGMII_LINK_STATUS_REPORT_LEN    1
#define RGMII_LINK_STATUS_REPORT_OFFSET 19
#define RGMII_LINK_SPEED_STATUS_LEN     2
#define RGMII_LINK_SPEED_STATUS_OFFSET  17
#define RGMII_LINK_MODE_STATUS_LEN      1
#define RGMII_LINK_MODE_STATUS_OFFSET   16
#define RGMII_LOOPBACK_MODE_LEN         1
#define RGMII_LOOPBACK_MODE_OFFSET      8
#define RGMII_PHY_SELECT_LEN            3
#define RGMII_PHY_SELECT_OFFSET         5
#define RGMII_DUPLEX_MODE_LEN           1
#define RGMII_DUPLEX_MODE_OFFSET        4
#define RGMII_TX_CONFIG_LEN             1
#define RGMII_TX_CONFIG_OFFSET          3
#define RGMII_LINK_STATUS_LEN           1
#define RGMII_LINK_STATUS_OFFSET        2
#define RGMII_MAC_SPEED_LEN             1
#define RGMII_MAC_SPEED_OFFSET          1
#define RGMII_PORT_SELECT_LEN           1
#define RGMII_PORT_SELECT_OFFSET        0

#define RGMII_GM_ARCACHE_LEN         4
#define RGMII_GM_ARCACHE_OFFSET      28
#define RGMII_GM_AWCACHE_LEN         4
#define RGMII_GM_AWCACHE_OFFSET      24
#define RGMII_OUTSTANDING_CFG_LEN    4
#define RGMII_OUTSTANDING_CFG_OFFSET 20
#define RGMII_DEBUG_CFG_LEN          20
#define RGMII_DEBUG_CFG_OFFSET       0

#endif // __RGMII_REG_OFFSET_FIELD_H__
